Publications

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Author Title [ Type(Desc)] Year
Filters: Keyword is Signal processing  [Clear All Filters]
Book Chapters
Plishker W, Sane N, Kiemb M, Bhattacharyya SS.  2011.  Heterogeneous Design in Functional DIF. Transactions on High-Performance Embedded Architectures and Compilers IV. :391-408.
Conference Papers
Saha S, Bhattacharyya SS, Wolf W.  2006.  A Communication Interface for Multiprocessor Signal Processing Systems. Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia. :127-132.
Wu H-H, Shen C-C, Bhattacharyya SS, Compton K, Schulte M, Wolf M, Zhang T.  2010.  Design and implementation of real-time signal processing applications on heterogeneous multiprocessor arrays. 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR). :2121-2125.
Hochheiser H, Baehrecke EH, Mount SM, Shneiderman B.  2003.  Dynamic querying for pattern identification in microarray and genomic data. 2003 International Conference on Multimedia and Expo, 2003. ICME '03. Proceedings. 3:III-453-6vol.3-III-453-6vol.3.
Neumann J, Fermüller C, Aloimonos Y.  2003.  Eye design in the plenoptic space of light rays. Ninth IEEE International Conference on Computer Vision, 2003. Proceedings. :1160-1167vol.2-1160-1167vol.2.
Bhattacharyya SS.  2011.  Methods for design and implementation of dynamic signal processing systems. 2011 International Conference on Embedded Computer Systems (SAMOS). :i-i.
Wu H-H, Shen C-C, Sane N, Plishker W, Bhattacharyya SS.  2011.  A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs. 2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW). :70-81.
Bhattacharyya SS, Plishker W, Sane N, Shen C-C, Wu H-H.  2011.  Modeling and optimization of dynamic signal processing in resource-aware sensor networks. 2011 8th IEEE International Conference on Advanced Video and Signal-Based Surveillance (AVSS). :449-454.
Hsu C-J, Bhattacharyya SS.  2005.  Porting DSP applications across design tools using the dataflow interchange format. Rapid System Prototyping, 2005. (RSP 2005). The 16th IEEE International Workshop on. :40-46.
Sane N, Kee H, Seetharaman G, Bhattacharyya SS.  2010.  Scalable representation of dataflow graph structures using topological patterns. 2010 IEEE Workshop on Signal Processing Systems (SIPS). :13-18.
Sane N, Hsu C-J, Pino JL, Bhattacharyya SS.  2010.  Simulating dynamic communication systems using the core functional dataflow model. 2010 IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP). :1538-1541.
Sen M, Bhattacharyya SS.  2004.  Systematic exploitation of data parallelism in hardware synthesis of DSP applications. Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on. 5:V-229-32vol.5-V-229-32vol.5.
Journal Articles
Khandelia M, Bambha NK, Bhattacharyya SS.  2006.  Contention-conscious transaction ordering in multiprocessor DSP systems. IEEE Transactions on Signal Processing. 54(2):556-569.
Ko M-Y, Zissulescu C, Puthenpurayil S, Bhattacharyya SS, Kienhuis B, Deprettere EF.  2007.  Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing. 55(6):3126-3138.
Yegnanarayana B, Prasanna SRM, Duraiswami R, Zotkin DN.  2005.  Processing of reverberant speech for time-delay estimation. IEEE Transactions on Speech and Audio Processing. 13(6):1110-1118.
Chen Y, Chakrabarti C, Bhattacharyya SS, Bougard B.  2010.  Signal Processing on Platforms with Multiple Cores: Part 2-Applications and Design [From the Guest Editors]. IEEE Signal Processing Magazine. 27(2):20-21.
Reports
Bhattacharyya SS, Shen C-C, Plishker W, Sane N, Wu H-H, Gu R.  2011.  Dataflow-Based Implementation of Layered Sensing Applications.
Yu S-S, Kolagotla RK, JaJa JF.  1992.  VLSI Architectures and Implementation of Predictive Tree- Searched Vector Quantizers for Real-Time Video Compression. ISR-TR-1992-48
Chiu C-T, Kolagotla RK, Liu RKJ, JaJa JF.  1992.  VLSI Implementation of Real-Time Parallel DCT/DST Lattice Structures for Video. ISR-TR-1992-34