Fpga-based prototype of a pram-on-chip processor
Title | Fpga-based prototype of a pram-on-chip processor |
Publication Type | Conference Papers |
Year of Publication | 2008 |
Authors | Wen X, Vishkin U |
Conference Name | Proceedings of the 5th conference on Computing frontiers |
Date Published | 2008/// |
Publisher | ACM |
Conference Location | New York, NY, USA |
ISBN Number | 978-1-60558-077-7 |
Keywords | ease-of-programming, explicit multi-threading, on-chip parallel processor, Parallel algorithms, PRAM, XMT |
Abstract | PRAM (Parallel Random Access Model) has been widely regarded a desirable parallel machine model for many years, but it is also believed to be "impossible in reality." As the new billion-transistor processor era begins, the eXplicit Multi-Threading (XMT) PRAM-On-Chip project is attempting to design an on-chip parallel processor that efficiently supports PRAM algorithms. This paper presents the first prototype of the XMT architecture that incorporates 64 simple in-order processors operating at 75MHz. The microarchitecture of the prototype is described and the performance is studied with respect to some micro-benchmarks. Using cycle accurate emulation, the projected performance of an 800MHz XMT ASIC processor is compared with AMD Opteron 2.6GHz, which uses similar area as would a 64-processor ASIC version of the XMT prototype. The results suggest that an only 800MHz XMT ASIC system outperforms AMD Opteron 2.6GHz, with speedups ranging between 1.57 and 8.56. |
URL | http://doi.acm.org/10.1145/1366230.1366240 |
DOI | 10.1145/1366230.1366240 |