Publications

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Vishkin U.  1983.  Efficient distributed orientation algorithm.. IEEE TRANS. INFO. THEORY.. 29(4):624-628.
Vishkin U.  1995.  On a technique for parsing a string. Combinatorial Pattern Matching. :386-386.
Vishkin U.  2010.  Computer Memory Architecture for Hybrid Serial and Parallel Computing Systems. 12/721,252
Vishkin U.  1991.  Structural parallel algorithmics. Automata, Languages and Programming. :363-380.
Vishkin U.  2007.  Thinking in parallel: Some basic data-parallel algorithms and techniques. UMIACS, University of Maryland, College Park. 1993
Vishkin U.  1984.  Randomized speed-ups in parallel computation. Proceedings of the sixteenth annual ACM symposium on Theory of computing. :230-239.
Vishkin U.  2000.  A no-busy-wait balanced tree parallel algorithmic paradigm. Proceedings of the twelfth annual ACM symposium on Parallel algorithms and architectures. :147-155.
Vishkin U.  1992.  A parallel blocking flow algorithm for acyclic networks. Journal of Algorithms. 13(3):489-501.
Vishkin U.  2008.  An Immediate Concurrent Execution (ICE) Abstraction Proposal for Many-Cores. Computer Science Research Works.
Vishkin U.  1987.  Randomized parallel speedups for list ranking* 1. Journal of Parallel and Distributed Computing. 4(3):319-333.
Vishkin U.  2004.  PRAM-On-Chip: A Quest for Not-So-Obvious Non-obviousness. Mathematical Foundations of Computer Science 2004Mathematical Foundations of Computer Science 2004. 3153:104-105.
Vishkin U.  1983.  Implementation of simultaneous memory address access in models that forbid it. Journal of algorithms. 4(1):45-50.
Vishkin U.  1996.  Can parallel algorithms enhance serial implementation? Communications of the ACM. 39(9):88-91.
Vishkin U.  2011.  Using simple abstraction to reinvent computing for parallelism. Commun. ACM. 54(1):75-85.
Vishkin U.  1991.  Can parallel algorithms enhance serial implementation? Parallel Processing Symposium, 1994. Proceedings., Eighth International. :376-385.
Vishkin U.  2007.  Towards Realizing a PRAM-On-Chip Vision. Workshop on Highly Parallel Processing on a Chip (HPPC). 28
Vishkin U.  1984.  An optimal parallel connectivity algorithm* 1. Discrete applied mathematics. 9(2):197-207.
Vishkin D, Vishkin U.  2000.  Experiments with list ranking for explicit multi-threaded (XMT) instruction parallelism. J. Exp. Algorithmics. 5
Vishkin U.  1993.  A case for the PRAM as a standard programmer's model. Parallel Architectures and their Efficient Use. :11-19.
Vishkin U.  2009.  Optical interconnect structure in a computer system and method of transporting data between processing elements and memory through the optical interconnect structure. 10/529,310(7505822)
Vishkin U.  1987.  An optimal parallel algorithm for selection. Parallel and Distributed Computing. 4:79-86.
Vishkin U, Nuzman JF.  2004.  Circuit architecture for reduced-synchrony on-chip interconnect. 10/166,008(6768336)
Vishkin U, Wigderson A.  1983.  Dynamic parallel memories. Information and control. 56(3):174-182.
Vishkin U.  1997.  From algorithm parallelism to instruction-level parallelism: An encode-decode chain using prefix-sum. Proceedings of the ninth annual ACM symposium on Parallel algorithms and architectures. :260-271.
Vishkin U.  1992.  Methods in parallel algorithmcs. Mathematical Foundations of Computer Science 1992. :81-81.

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