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Kee H, Bhattacharyya SS, Kornerup J.  2010.  Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs. 2010 International Conference on Embedded Computer Systems (SAMOS). :136-143.
Khandelia M, Bambha NK, Bhattacharyya SS.  2006.  Contention-conscious transaction ordering in multiprocessor DSP systems. IEEE Transactions on Signal Processing. 54(2):556-569.
Ko M-Y, Zissulescu C, Puthenpurayil S, Bhattacharyya SS, Kienhuis B, Deprettere EF.  2007.  Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing. 55(6):3126-3138.