Publications
Export 3 results:
Author Title Type [ Year] Filters: Keyword is digital signal processing chips [Clear All Filters]
2010. Efficient static buffering to guarantee throughput-optimal FPGA implementation of synchronous dataflow graphs. 2010 International Conference on Embedded Computer Systems (SAMOS). :136-143.
2007. Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing. 55(6):3126-3138.
2006. Contention-conscious transaction ordering in multiprocessor DSP systems. IEEE Transactions on Signal Processing. 54(2):556-569.