Publications

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Author Title Type [ Year(Asc)]
Filters: Keyword is embedded systems  [Clear All Filters]
2010
Wu H-H, Kee H, Sane N, Plishker W, Bhattacharyya SS.  2010.  Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs. 2010 21st IEEE International Symposium on Rapid System Prototyping (RSP). :1-7.
Sane N, Kee H, Seetharaman G, Bhattacharyya SS.  2010.  Scalable representation of dataflow graph structures using topological patterns. 2010 IEEE Workshop on Signal Processing Systems (SIPS). :13-18.
2007
Ko M-Y, Zissulescu C, Puthenpurayil S, Bhattacharyya SS, Kienhuis B, Deprettere EF.  2007.  Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation. IEEE Transactions on Signal Processing. 55(6):3126-3138.
Mangeruca L, Baleani M, Ferrari A, Sangiovanni-Vincentelli A.  2007.  Semantics-Preserving Design of Embedded Control Software from Synchronous Models. Software Engineering, IEEE Transactions on. 33(8):497-509.
2005
Kianzad V, Bhattacharyya SS, Qu G.  2005.  CASPER: an integrated energy-driven approach for task graph scheduling on distributed embedded systems. Application-Specific Systems, Architecture Processors, 2005. ASAP 2005. 16th IEEE International Conference on. :191-197.
2004
Sen M, Bhattacharyya SS.  2004.  Systematic exploitation of data parallelism in hardware synthesis of DSP applications. Acoustics, Speech, and Signal Processing, 2004. Proceedings. (ICASSP '04). IEEE International Conference on. 5:V-229-32vol.5-V-229-32vol.5.