TY - JOUR T1 - Topological Patterns for Scalable Representation and Analysis of Dataflow Graphs JF - Journal of Signal Processing Systems Y1 - 2011 A1 - Sane, Nimish A1 - Kee, Hojin A1 - Seetharaman, Gunasekaran A1 - Bhattacharyya, Shuvra S. KW - Circuits and Systems KW - Computer Imaging, Vision, Pattern Recognition and Graphics KW - Dataflow graphs KW - Electrical Engineering KW - High-level languages KW - Image Processing and Computer Vision KW - model-based design KW - pattern recognition KW - Signal processing systems KW - Signal, Image and Speech Processing KW - Topological patterns AB - Tools for designing signal processing systems with their semantic foundation in dataflow modeling often use high-level graphical user interfaces (GUIs) or text based languages that allow specifying applications as directed graphs. Such graphical representations serve as an initial reference point for further analysis and optimizations that lead to platform-specific implementations. For large-scale applications, the underlying graphs often consist of smaller substructures that repeat multiple times. To enable more concise representation and direct analysis of such substructures in the context of high level DSP specification languages and design tools, we develop the modeling concept of topological patterns, and propose ways for supporting this concept in a high-level language. We augment the dataflow interchange format (DIF) language—a language for specifying DSP-oriented dataflow graphs—with constructs for supporting topological patterns, and we show how topological patterns can be effective in various aspects of embedded signal processing design flows using specific application examples. VL - 65 SN - 1939-8018, 1939-8115 UR - http://link.springer.com/article/10.1007/s11265-011-0610-1 CP - 2 J1 - J Sign Process Syst ER -