@conference {19262,
	title = {Methods for design and implementation of dynamic signal processing systems},
	booktitle = {2011 International Conference on Embedded Computer Systems (SAMOS)},
	year = {2011},
	month = {2011},
	pages = {i - i},
	abstract = {Summary form only given. Dynamic signal processing systems, where significant changes in functionality and computational structure must be achieved while applications are running, are becoming increasingly important as computational platforms become more powerful, and feature-sets of DSP-powered products become more sophisticated. This talk covers two new, complementary dataflow models of computation that are being developed in the Maryland DSPCAD Research Group to help address the challenges of structured design, simulation, and synthesis of dynamic signal processing systems. The first of these models, called enable-invoke dataflow (EIDF), is aimed improving the predictability of actor invocation and the efficiency with which dynamic scheduling techniques can be realized. The second model, called the dataflow schedule graph (DSG), provides a formal framework for representing and analyzing dataflow graph schedules that is rooted in formal dataflow semantics, and accommodates a wide range of schedule classes, including static, quasi-static, and dynamic schedules, as well as both sequential and parallel schedule formats. In this talk, I will present the EIDF and DSG models and discuss their potential to improve the processes by which dynamic signal processing systems are developed.},
	keywords = {actor invocation predictability, complementary dataflow models, Computational modeling, computational structure, COMPUTERS, data flow graphs, dataflow schedule graph, DSG models, DSP-powered products, Dynamic scheduling, dynamic scheduling techniques, dynamic signal processing systems, Educational institutions, EIDF models, enable-invoke dataflow, formal dataflow semantics, functionality structure, Laboratories, Maryland DSPCAD Research Group, quasi-static schedules, Schedules, scheduling, Signal processing, static schedules},
	author = {Bhattacharyya, Shuvra S.}
}
@conference {19270,
	title = {A Model-Based Schedule Representation for Heterogeneous Mapping of Dataflow Graphs},
	booktitle = {2011 IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)},
	year = {2011},
	month = {2011},
	pages = {70 - 81},
	abstract = {Dataflow-based application specifications are widely used in model-based design methodologies for signal processing systems. In this paper, we develop a new model called the dataflow schedule graph (DSG) for representing a broad class of dataflow graph schedules. The DSG provides a graphical representation of schedules based on dataflow semantics. In conventional approaches, applications are represented using dataflow graphs, whereas schedules for the graphs are represented using specialized notations, such as various kinds of sequences or looping constructs. In contrast, the DSG approach employs dataflow graphs for representing both application models and schedules that are derived from them. Our DSG approach provides a precise, formal framework for unambiguously representing, analyzing, manipulating, and interchanging schedules. We develop detailed formulations of the DSG representation, and present examples and experimental results that demonstrate the utility of DSGs in the context of heterogeneous signal processing system design.},
	keywords = {Computational modeling, data flow graphs, dataflow schedule graph, dataflow semantics, dataflow-based application specifications, Dynamic scheduling, heterogeneous mapping, heterogeneous signal processing system design, model-based design methodologies, model-based schedule representation, Processor scheduling, Program processors, Schedules, semantics, Signal processing, synchronization},
	author = {Wu, Hsiang-Huang and Chung-Ching Shen and Sane, N. and Plishker,W. and Bhattacharyya, Shuvra S.}
}
