@conference {14926,
	title = {A Fast Algorithm for Constructing Inverted Files on Heterogeneous Platforms},
	booktitle = {Parallel Distributed Processing Symposium (IPDPS), 2011 IEEE International},
	year = {2011},
	month = {2011/05//},
	pages = {1124 - 1134},
	abstract = {Given a collection of documents residing on a disk, we develop a new strategy for processing these documents and building the inverted files extremely fast. Our approach is tailored for a heterogeneous platform consisting of a multicore CPU and a highly multithreaded GPU. Our algorithm is based on a number of novel techniques including: (i) a high-throughput pipelined strategy that produces parallel parsed streams that are consumed at the same rate by parallel indexers, (ii) a hybrid trie and B-tree dictionary data structure in which the trie is represented by a table for fast look-up and each B-tree node contains string caches, (iii) allocation of parsed streams with frequent terms to CPU threads and the rest to GPU threads so as to match the throughput of parsed streams, and (iv) optimized CUDA indexer implementation that ensures coalesced memory accesses and effective use of shared memory. We have performed extensive tests of our algorithm on a single node (two Intel Xeon X5560 Quad-core) with two NVIDIA Tesla C1060 attached to it, and were able to achieve a throughput of more than 262 MB/s on the ClueWeb09 dataset. Similar results were obtained for widely different datasets. The throughput of our algorithm is superior to the best known algorithms reported in the literature even when compared to those run on large clusters.},
	keywords = {architecture;graphics, B-tree, C1060;central, construction;multicore, CPU;multithreaded, data, device, dictionary, equipment;coprocessors;data, files, GPU;computer, graphic, indexer;Intel, pipelined, platform;high-throughput, PROCESSING, Quad-core;NVIDIA, strategy;hybrid, structure;CUDA, structure;inverted, structures;multiprocessing, systems;, Tesla, trie, unified, unit;computer, unit;heterogeneous, X5560, Xeon},
	doi = {10.1109/IPDPS.2011.107},
	author = {Wei, Zheng and JaJa, Joseph F.}
}
@conference {12227,
	title = {Channel Access Throttling for Improving WLAN QoS},
	booktitle = {Sensor, Mesh and Ad Hoc Communications and Networks, 2009. SECON {\textquoteright}09. 6th Annual IEEE Communications Society Conference on},
	year = {2009},
	month = {2009/06//},
	pages = {1 - 9},
	abstract = {The de facto QoS channel access method for the IEEE 802.11 Wireless LANs is the Enhanced Distributed Channel Access (EDCA) mechanism, which differentiates transmission treatments for data frames belonging to different traffic categories with four different levels of channel access priority. In this paper, we propose extending EDCA with Channel Access Throttling (CAT) for more flexible and efficient QoS support. By assigning different member stations different channel access parameters, CAT differentiates channel access priorities not between traffic categories but between member stations. Then by dynamically changing the channel access parameters of each member station based on a pre-computed schedule, CAT enables EDCA WLANs the benefits of scheduled access QoS. We also present evaluation results of CAT obtained from both simulations and experiments conducted using off-the-shelf WLAN hardware and open-source device driver. Our results show that CAT can proportionally partition channel capacity, significantly improve performance of multimedia applications, effectively achieve performance protection for admitted flows, and increase per cell VoIP call capacity by up to 41\%.},
	keywords = {802.11, access, area, call, capacity;data, capacity;quality, capacity;WLAN, categories;transmission, channel, device, distributed, driver;quality, facto, frames;de, IEEE, LAN;, LAN;VoIP, local, mechanism;member, method;enhanced, multimedia, network;wireless, networks;channel, of, parameters;channel, priority;channel, QoS, QoS;channel, service;telecommunication, service;traffic, standards;telecommunication, stations;open-source, throttling;channel, traffic;wireless, treatments;wireless, wireless},
	doi = {10.1109/SAHCN.2009.5168915},
	author = {Han,Bo and Ji,Lusheng and Lee,Seungjoon and Miller,R.R. and Bhattacharjee, Bobby}
}
@conference {12226,
	title = {Channel Access Throttling for Overlapping BSS Management},
	booktitle = {Communications, 2009. ICC {\textquoteright}09. IEEE International Conference on},
	year = {2009},
	month = {2009/06//},
	pages = {1 - 6},
	abstract = {Multiple co-channel WLAN BSSes (i.e., WLAN cells) overlapping in coverage are generally considered undesirable because members of the OBSSes compete for channel access, which typically increases the contention level of wireless medium access and reduces overall system performance. In this paper, we propose to use channel access throttling (CAT) for managing Wireless LAN radio resources for overlapping BSSes (OBSSes). CAT provides an access point (AP) of each BSS with a mechanism to control channel access parameters of its member stations on the fly. By coordinating the CAT operations of the OBSS APs, we can enable privileged channel access to an individual BSS at a particular time, for example, by assigning high priority access parameters to member stations associated with the BSS. By controlling how much each BSS may be given the privileged channel access, we can also achieve a proportional partitioning of channel capacity among OBSSes. We present evaluation results obtained from both simulations and experiments using testbed built with commercial off-the-shelf (COTS) WLAN hardware and open-source device driver. Our results show that with CAT, not only can we proportionally partition channel capacity among the OBSSes, but also improve channel utilization efficiency and increase overall capacity.},
	keywords = {access, access;cellular, allocation;channel, BSS, capacity;computer, capacity;proportional, cell;open-source, channel, channels;, co-channel, device, driver;overlapping, efficiency;high-priority, LAN;wireless, management;partition, management;wireless, medium, network, parameters;multiple, partitioning;radio, radio;channel, resources;wireless, throttling;channel, utilization, WLAN},
	doi = {10.1109/ICC.2009.5198815},
	author = {Han,Bo and Ji,Lusheng and Lee,Seungjoon and Miller,R.R. and Bhattacharjee, Bobby}
}
@conference {15376,
	title = {Advances in spherical harmonic device modeling: calibration and nanoscale electron dynamics},
	booktitle = {Simulation of Semiconductor Processes and Devices, 1999. SISPAD {\textquoteright}99. 1999 International Conference on},
	year = {1999},
	month = {1999///},
	pages = {167 - 170},
	abstract = {Improvements in the Spherical Harmonic (SH) method for solving Boltzmann Transport Equation (BTE) are presented. The simulation results provide the same physical detail as analytical band Monte Carlo (MC) calculations, and are obtained approximately a thousand times faster. A new physical model for surface scattering has also been developed. As a result, the SHBTE model achieves calibration for a complete process of I-V characteristics and substrate current consistently for the first time},
	keywords = {Boltzmann, characteristics;SHBTE, current;surface, device, dynamics;spherical, electron, equation;calibration;semiconductor, equation;I-V, harmonic, model;substrate, models;surface, scattering;, scattering;Boltzmann, simulation;calibration;nanoscale, transport},
	doi = {10.1109/SISPAD.1999.799287},
	author = {Lin,Chung-Kai and Goldsman,N. and Mayergoyz, Issak D and Aronowitz,S. and Belova,N.}
}
@conference {15386,
	title = {Gate leakage current simulation by Boltzmann transport equation and its dependence on the gate oxide thickness},
	booktitle = {Simulation of Semiconductor Processes and Devices, 1999. SISPAD {\textquoteright}99. 1999 International Conference on},
	year = {1999},
	month = {1999///},
	pages = {247 - 250},
	abstract = {As device dimensions shrink toward 0.1 mu;m, gate oxides are becoming so thin that MOSFET gate leakage current and oxide degradation are becoming limiting issues. We provide a more rigorous way to calculate gate leakage current. To achieve this we build upon the Spherical Harmonic Method of modeling, which deterministically solves the Boltzmann equation for an entire device. The method gives the distribution function and is 1000 times faster than MC. Once the distribution function is calculated, the tunneling probability is derived from the first principle WKB method. The barrier lowering effect is accounted for by the method of image charges. We calculate gate leakage current as a function of DC bias. The thermionic and tunneling components are compared at different DC bias points. The dependence of gate leakage current on gate oxide thickness is simulated},
	keywords = {30, angstrom;60, angstrom;Boltzmann, Bias, calculations;leakage, charges;spherical, component;tunneling, current, currents;semiconductor, dependence;method, dependence;MOSFET;barrier, device, effect;distribution, equation;DC, equation;MOSFET;WKB, function;first, harmonic, image, leakage, lowering, method, method;gate, model;thermionic, models;tunnelling;, of, oxide, principle, probability;Boltzmann, simulation;gate, thickness, transport, WKB},
	doi = {10.1109/SISPAD.1999.799307},
	author = {Han,Zhiyi and Lin,Chung-Kai and Goldsman,N. and Mayergoyz, Issak D and Yu,S. and Stettler,M.}
}
@article {15369,
	title = {2-D MOSFET modeling including surface effects and impact ionization by self-consistent solution of the Boltzmann, Poisson, and hole-continuity equations},
	journal = {Electron Devices, IEEE Transactions on},
	volume = {44},
	year = {1997},
	month = {1997/02//},
	pages = {257 - 267},
	abstract = {We present a new two-dimensional (2-D) MOSFET simulation method achieved by directly solving the Boltzmann transport equation for electrons, the hole-current continuity equation, and the Poisson equation self-consistently. The spherical harmonic method is used for the solution of the Boltzmann equation. The solution directly gives the electron distribution function, electrostatic potential, and the hole concentration for the entire 2-D MOSFET. Average quantities such as electron concentration and electron temperature are obtained directly from the integration of the distribution function. The collision integral is formulated to arbitrarily high spherical harmonic order, and new collision terms are included that incorporate effects of surface scattering and electron-hole pair recombination/generation. I-V characteristics, which agree with experiment, are calculated directly from the distribution function for an LDD submicron MOSFET. Electron-hole pair generation due to impact ionization is also included by direct application of the collision integral. The calculations are efficient enough for day-to-day engineering design on workstation-type computers},
	keywords = {2D, characteristics;LDD, concentration;electron, concentration;hole-continuity, density;electron-hole, density;impact, device, distribution, effects;surface, equation;collision, equation;I-V, equation;MOSFET;electron, equations;impact, equations;semiconductor, function;electron, generation;electron-hole, harmonic, integral;electron, ionisation;integral, ionization;self-consistent, method;Boltzmann, method;surface, modeling;Boltzmann, models;surface, MOSFET, MOSFET;Poisson, pair, potential;hole, recombination;electrostatic, recombination;hole, scattering;, scattering;two-dimensional, simulation, solution;spherical, submicron, temperature;electron-hole, transport},
	isbn = {0018-9383},
	doi = {10.1109/16.557713},
	author = {Liang,Wenchao and Goldsman,N. and Mayergoyz, Issak D and Oldiges,P.J.}
}
@article {15374,
	title = {A parallel-in-time method for the transient simulation of SOI devices with drain current overshoots},
	journal = {Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on},
	volume = {13},
	year = {1994},
	month = {1994/08//},
	pages = {1035 - 1044},
	abstract = {This paper presents a new parallel-in-time algorithm for the two dimensional transient simulation of SOI devices. With this approach, simulation in both space and time domains is performed in parallel As a result, the CPU time is reduced significantly from the conventional serial-in-time method. This new approach fully exploits the inherent parallelism of the finite difference formulation of the basic semiconductor device equations and the massively parallel architecture of SIMD computers. The space domain computations are inherently parallel due to the nature of our technique of solving the finite-difference equations. Time domain parallelism is achieved by shifting the potentials from previous time points to subsequent points one-step forward along the time axis with each Gummel iteration. This algorithm employs a fixed-point iteration technique, therefore a direct solution of matrix equations is avoided. The algorithm is especially suitable for the transient simulation of SOI devices that exhibit transient drain current overshoot. Numerical experiments show that the new parallel-in-time method is up to eight times faster than the conventional serial-in-time method in SOI transient simulations. The program is coded in CM Fortran for the Connection Machine},
	keywords = {2D, algorithms;semiconductor, analysis;transient, architecture;parallel-in-time, boundaries;silicon;time-domain, computations;time, computers;SOI, computing;finite, current, device, devices;drain, devices;parallel, difference, dimensional, domain, effect, engineering, equations;fixed-point, equations;space, field, Fortran;CPU, gate, iteration, iteration;SIMD, Machine;Gummel, method;semiconductor, methods;insulated, methods;metal-insulator-semiconductor, models;semiconductor-insulator, overshoots;finite-difference, Parallel, parallelism;transient, response;, simulation;CM, simulation;digital, simulation;electronic, simulation;two, technique;massively, time;Connection, transistors;iterative},
	isbn = {0278-0070},
	doi = {10.1109/43.298039},
	author = {Tai,G.-C. and Korman,C.E. and Mayergoyz, Issak D}
}
@article {15388,
	title = {Investigation of the threshold voltage of MOSFETs with position and potential-dependent interface trap distributions using a fixed-point iteration method},
	journal = {Electron Devices, IEEE Transactions on},
	volume = {37},
	year = {1990},
	month = {1990/04//},
	pages = {1031 - 1038},
	abstract = {Simulation results are presented for a MOSFET with position- and energy- (potential-) dependent interface trap distributions that may be typical for devices subjected to interface-trap-producing processes such as hot-electron degradation. The interface-trap distribution is modeled as a Gaussian peak at a given position along the channel, and the energy dependence is derived from <e1>C</e1>-<e1>V</e1> measurements from an MOS capacitor exposed to ionizing radiation. A novel fixed-point technique is used to solve the two-dimensional boundary-value problem. The technique is shown to be globally convergent for arbitrary distributions of interface traps. A comparison of the convergence properties of the Newton and fixed-point methods is presented, and it is shown that for some important cases the Newton technique fails to converge while the fixed-point technique converges with a geometric convergence rate},
	keywords = {boundary-value, C-V, carriers;insulated, characteristics;Gaussian, Convergence, convergence;hot-electron, degradation;position, dependence;fixed-point, dependent, device, distribution;potential-dependent, distributions;simulation;threshold, effect, electron, field, gate, interface, iteration, method;fixed-point, methods;hot, methods;semiconductor, models;, numerical, of, peak;MOSFET;energy, problem;boundary-value, problems;convergence, rate;global, states;iterative, technique;geometric, transistors;interface, trap, voltage;two-dimensional},
	isbn = {0018-9383},
	doi = {10.1109/16.52438},
	author = {Gaitan,M. and Mayergoyz, Issak D and Korman,C.E.}
}
