Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format

TitleDesign and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format
Publication TypeJournal Articles
Year of Publication2012
AuthorsShen C-C, Wu S, Sane N, Wu H-H, Plishker W, Bhattacharyya SS
JournalIEEE Transactions on Multimedia
Pagination630 - 640
Date Published2012
ISBN Number1520-9210
Keywordsassociated dataflow graph-code generation, Computational modeling, contextual information encapsulation, cross-platform application design, data flow graphs, Data models, Data structures, Dataflow graphs, design components, design tools, Digital signal processing, electronic data interchange, embedded signal processing, Embedded software, high-level abstract modeling, high-performance embedded-processing architectures, Image coding, image registration application, image representation, low-level customizations, low-level optimization, low-level synthesis, Multimedia communication, multimedia systems, multimedia systems development, object-oriented data structures, object-oriented methods, parameterized schedule representation, programming interfaces, repetitive graph structures, retargetable design, Schedules, scheduling, software synthesis, Streaming media, targeted dataflow interchange format, task-level dataflow analysis

Development of multimedia systems that can be targeted to different platforms is challenging due to the need for rigorous integration between high-level abstract modeling, and low-level synthesis and optimization. In this paper, a new dataflow-based design tool called the targeted dataflow interchange format is introduced for retargetable design, analysis, and implementation of embedded software for multimedia systems. Our approach provides novel capabilities, based on principles of task-level dataflow analysis, for exploring and optimizing interactions across design components; object-oriented data structures for encapsulating contextual information for components; a novel model for representing parameterized schedules that are derived from repetitive graph structures; and automated code generation for programming interfaces and low-level customizations that are geared toward high-performance embedded-processing architectures. We demonstrate our design tool for cross-platform application design, parameterized schedule representation, and associated dataflow graph-code generation using a case study centered around an image registration application.