FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques

TitleFPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques
Publication TypeConference Papers
Year of Publication2010
AuthorsKee H, Bhattacharyya SS, Wong I, Rao Y
Conference Name2010 IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP)
Date Published2010
Keywords3G mobile communication, 3GPP-long term evolution, 3GPP-LTE physical layer, 4G communication systems, Computational modeling, data flow analysis, data flow graphs, Dataflow modeling, Digital signal processing, DSP applications, Field programmable gate arrays, FPGA architecture framework, FPGA implementation, FPGA-based design, Hardware, hardware synthesis, Instruments, LabVIEW FPGA, Logic Design, LTE, next generation cellular standard, parameterized synchronous data flow technique, Pervasive computing, Physical layer, Physics computing, Production, PSDF graph, reconfigurable hardware implementation, Runtime, software synthesis, Ubiquitous Computing, ubiquitous data flow model
Abstract

Synchronous dataflow (SDF) is an ubiquitous dataflow model of computation that has been studied extensively for efficient simulation and software synthesis of DSP applications. In recent years, parameterized SDF (PSDF) has evolved as a useful framework for modeling SDF graphs in which arbitrary parameters can be changed dynamically. However, the potential to enable efficient hardware synthesis has been treated relatively sparsely in the literature for SDF and even more so for the newer, more general PSDF model. This paper investigates efficient FPGA-based design and implementation of the physical layer for 3GPP-Long Term Evolution (LTE), a next generation cellular standard. To capture the SDF behavior of the functional core of LTE along with higher level dynamics in the standard, we use a novel PSDF-based FPGA architecture framework. We implement our PSDF-based, LTE design framework using National Instrument's LabVIEW FPGA, a recently-introduced commercial platform for reconfigurable hardware implementation. We show that our framework can effectively model the dynamics of the LTE protocol, while also providing a synthesis framework for efficient FPGA implementation.