%0 Patent %D 2004 %T Circuit architecture for reduced-synchrony on-chip interconnect %A Vishkin, Uzi %A Nuzman,Joseph F. %E University of Maryland, College Park %X The invention relates to an interconnect, and to interconnect architecture, for communicating between processing elements and memory modules in a computer system comprising on-chip parallel computation, in order to reduce the tight synchrony that is required by important components of most present computers. %V 10/166,008 %8 2004/07/27/ %G eng %U http://www.google.com/patents?id=RRUSAAAAEBAJ %N 6768336