%0 Journal Article
%J Computers, IEEE Transactions on
%D 1991
%T VLSI architectures for multidimensional transforms
%A Chakrabarti,C.
%A JaJa, Joseph F.
%K architecture;
%K architectures;
%K arithmetic;
%K complexity;
%K computational
%K Computer
%K digital
%K fixed-precision
%K linear
%K multidimensional
%K separable
%K transforms;
%K VLSI
%X The authors propose a family of VLSI architectures with area-time tradeoffs for computing (N times;N times; . . . times;N) d-dimensional linear separable transforms. For fixed-precision arithmetic with b bits, the architectures have an area A=O(Nd+2a) and computation time T=O(dNd/2-ab ), and achieve the AT2 bound of AT2=O(n2b 2) for constant d, where n=Nd and O lt;a les;d/2
%B Computers, IEEE Transactions on
%V 40
%P 1053 - 1057
%8 1991/09//
%@ 0018-9340
%G eng
%N 9
%R 10.1109/12.83648