TY - CONF T1 - Design and implementation of real-time signal processing applications on heterogeneous multiprocessor arrays T2 - 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) Y1 - 2010 A1 - Wu, Hsiang-Huang A1 - Chung-Ching Shen A1 - Bhattacharyya, Shuvra S. A1 - Compton, K. A1 - Schulte, M. A1 - Wolf, M. A1 - Zhang, Tong KW - application specific integrated circuits KW - application-specific integrated circuits KW - computational elements KW - Computer architecture KW - decoding KW - Field programmable gate arrays KW - field programmable X arrays KW - FPGA KW - FPXA KW - Integrated circuit modeling KW - Logic Design KW - microprocessor chips KW - multicore processors KW - multiprocessor arrays KW - real-time signal processing KW - reconfigurable architectures KW - reconfigurable processors KW - Routing KW - Signal processing KW - Signal processing systems KW - systolic arrays KW - Viterbi algorithm AB - Processing structures based on arrays of computational elements form an important class of architectures, which includes field programmable gate arrays (FPGAs), systolic arrays, and various forms of multicore processors. A wide variety of design methods and tools have been targeted to regular processing arrays involving homogeneous processing elements. In this paper, we introduce the concept of field programmable X arrays (FPXAs) as an abstract model for design and implementation of heterogeneous multiprocessor arrays for signal processing systems. FPXAs are abstract structures that can be targeted for implementation on application-specific integrated circuits, FPGAs, or other kinds of reconfigurable processors. FPXAs can also be mapped onto multicore processors for flexible emulation. We discuss the use of dataflow models as an integrated application representation and intermediate representation for efficient specification and mapping of signal processing systems on FPXAs. We demonstrate our proposed models and techniques with a case study involving the embedding of an application-specific FPXA system on an off-the-shelf FPGA device. JA - 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers (ASILOMAR) ER -