TY - JOUR T1 - Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition JF - Computers, IEEE Transactions on Y1 - 1990 A1 - Chakrabarti,C. A1 - JaJa, Joseph F. KW - architectures; KW - architectures;two-dimensional KW - arithmetic;discrete KW - arrays;fast KW - binary KW - cosine KW - decomposition;systolic KW - design;prime KW - factor KW - Fourier KW - Hartley;discrete KW - systolic KW - transforms;hardware KW - transforms;parallel AB - Two-dimensional systolic array implementations for computing the discrete Hartley transform (DHT) and the discrete cosine transform (DCT) when the transform size N is decomposable into mutually prime factors are proposed. The existing two-dimensional formulations for DHT and DCT are modified, and the corresponding algorithms are mapped into two-dimensional systolic arrays. The resulting architecture is fully pipelined with no control units. The hardware design is based on bit serial left to right MSB (most significant bit) to LSB (least significant bit) binary arithmetic VL - 39 SN - 0018-9340 CP - 11 M3 - 10.1109/12.61045 ER -