TY - CONF T1 - Data Centric Cache Measurement on the Intel ltanium 2 Processor T2 - Proceedings of the 2004 ACM/IEEE conference on Supercomputing Y1 - 2004 A1 - Buck, Bryan R A1 - Hollingsworth, Jeffrey K AB - Processor speed continues to increase faster than the speed of access to main memory, making effective use of memory caches more important. Information about an applicationýs interaction with the cache is therefore critical to performance tuning. To be most useful, tools that measure this information should relate it to the source code level data structures in an application. We describe how to gather such information by using hardware performance counters to sample cache miss addresses, and present a new tool named Cache Scope that does this using the Intel Itanium 2 performance monitors. We present experimental results concerning Cache Scopeýs accuracy and perturbation of cache behavior. We also describe a case study of using Cache Scope to tune two applications, achieving 24% and 19% reductions in running time. JA - Proceedings of the 2004 ACM/IEEE conference on Supercomputing T3 - SC '04 PB - IEEE Computer Society SN - 0-7695-2153-3 UR - http://dx.doi.org/10.1109/SC.2004.21 M3 - http://dx.doi.org/10.1109/SC.2004.21 ER -