@conference {19297,
	title = {FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques},
	booktitle = {2010 IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP)},
	year = {2010},
	month = {2010},
	pages = {1510 - 1513},
	abstract = {Synchronous dataflow (SDF) is an ubiquitous dataflow model of computation that has been studied extensively for efficient simulation and software synthesis of DSP applications. In recent years, parameterized SDF (PSDF) has evolved as a useful framework for modeling SDF graphs in which arbitrary parameters can be changed dynamically. However, the potential to enable efficient hardware synthesis has been treated relatively sparsely in the literature for SDF and even more so for the newer, more general PSDF model. This paper investigates efficient FPGA-based design and implementation of the physical layer for 3GPP-Long Term Evolution (LTE), a next generation cellular standard. To capture the SDF behavior of the functional core of LTE along with higher level dynamics in the standard, we use a novel PSDF-based FPGA architecture framework. We implement our PSDF-based, LTE design framework using National Instrument{\textquoteright}s LabVIEW FPGA, a recently-introduced commercial platform for reconfigurable hardware implementation. We show that our framework can effectively model the dynamics of the LTE protocol, while also providing a synthesis framework for efficient FPGA implementation.},
	keywords = {3G mobile communication, 3GPP-long term evolution, 3GPP-LTE physical layer, 4G communication systems, Computational modeling, data flow analysis, data flow graphs, Dataflow modeling, Digital signal processing, DSP applications, Field programmable gate arrays, FPGA architecture framework, FPGA implementation, FPGA-based design, Hardware, hardware synthesis, Instruments, LabVIEW FPGA, Logic Design, LTE, next generation cellular standard, parameterized synchronous data flow technique, Pervasive computing, Physical layer, Physics computing, Production, PSDF graph, reconfigurable hardware implementation, Runtime, software synthesis, Ubiquitous Computing, ubiquitous data flow model},
	author = {Kee, Hojin and Bhattacharyya, Shuvra S. and Wong, I. and Yong Rao}
}
@conference {17577,
	title = {Computing with very weak random sources},
	booktitle = {, 35th Annual Symposium on Foundations of Computer Science, 1994 Proceedings},
	year = {1994},
	month = {1994/11/20/22},
	pages = {264 - 275},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {For any fixed ε>0, we show how to simulate RP algorithms in time nO(log n) using the output of a δ-source with min-entropy R(ε). Such a weak random source is asked once for R(ε) bits; it outputs an R-bit string such that any string has probability at most 2-R(ε). If ε>1-1/(k+1), our BPP simulations take time nO(log(k n)) (log(k) is the logarithm iterated k times). We also give a polynomial-time BPP simulation using Chor-Goldreich sources of min-entropy RΩ(1), which is optimal. We present applications to time-space tradeoffs, expander constructions, and the hardness of approximation. Also of interest is our randomness-efficient Leftover Hash Lemma, found independently by Goldreich and Wigderson},
	keywords = {Application software, BPP simulations, Chor-Goldreich sources, computational complexity, Computational modeling, Computer science, Computer simulation, cryptography, distributed algorithms, expander constructions, hardness, MATHEMATICS, min-entropy, Physics computing, Polynomials, probability, R-bit string, randomness-efficient Leftover Hash Lemma, RP algorithms simulation, Testing, time-space tradeoffs, very weak random sources},
	isbn = {0-8186-6580-7},
	doi = {10.1109/SFCS.1994.365688},
	author = {Srinivasan, Aravind and Zuckerman,D.}
}
@conference {17896,
	title = {Efficient runtime support for parallelizing block structured applications},
	booktitle = {Scalable High-Performance Computing Conference, 1994., Proceedings of the},
	year = {1994},
	month = {1994/05//},
	pages = {158 - 167},
	abstract = {Scientific and engineering applications often involve structured meshes. These meshes may be nested (for multigrid codes) and/or irregularly coupled (called multiblock or irregularly coupled regular mesh problems). We describe a runtime library for parallelizing these applications on distributed memory parallel machines in an efficient and machine-independent fashion. This runtime library is implemented on several different systems. This library can be used by application programmers to port applications by hand and can also be used by a compiler to handle communication for these applications. Our experimental results show that our primitives have low runtime communication overheads. We have used this library to port a multiblock template and a multigrid code. Effort is also underway to port a complete multiblock computational fluid dynamics code using our library},
	keywords = {application programmers, block structured applications, distributed memory parallel machines, distributed memory systems, engineering applications, irregularly coupled regular mesh problems, machine-independent, multiblock, multiblock computational fluid dynamics code, multiblock template, multigrid codes, Parallel machines, parallel programming, Physics computing, runtime communication overhead, Runtime library, runtime support, scientific applications, software reusability, structured meshes},
	doi = {10.1109/SHPCC.1994.296639},
	author = {Agrawal,G. and Sussman, Alan and Saltz, J.}
}
