@conference {14736,
	title = {State transfer for clear and efficient runtime updates},
	booktitle = {2011 IEEE 27th International Conference on Data Engineering Workshops (ICDEW)},
	year = {2011},
	month = {2011/04/11/16},
	pages = {179 - 184},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {Dynamic software updating (DSU), the practice of updating software while it executes, is a lively area of research. The DSU approach most prominent in both commercial and research systems is in-place updating, in which patches containing program modifications are loaded into a running process. However, in-place updating suffers from several problems: it requires complex tool support, it may adversely affect the performance of normal execution, it requires challenging reasoning to understand the behavior of an updated program, and it requires extra effort to modify program state to be compatible with an update. This paper presents preliminary work investigating the potential for state transfer updating to address these problems. State transfer updates work by launching a new process running the updated program version and transferring program state from the running process to the updated version. In this paper, we describe the use and implementation of Ekiden, a new state transfer updating library for C/C++ programs. Ekiden seeks to redress the difficulties of in-place updating, and we report on our experience updating VSFTPD using Ekiden. This initial experience suggests that state transfer provides the availability benefits of in-place DSU approaches while addressing many of their shortcomings.},
	keywords = {C++ language, C++ program, Cognition, complex tool support, dynamic software updating, efficient runtime update, in-place DSU approach, Libraries, Operating systems, program modification, Program processors, program transfer, program version, Runtime, servers, software libraries, Software maintenance, state transfer update, Steady-state, updating library, VSFTPD},
	isbn = {978-1-4244-9195-7},
	doi = {10.1109/ICDEW.2011.5767632},
	author = {Hayden,C.M. and Smith,E. K and Hicks, Michael W. and Foster, Jeffrey S.}
}
@conference {19295,
	title = {Buffer management for multi-application image processing on multi-core platforms: Analysis and case study},
	booktitle = {2010 IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP)},
	year = {2010},
	month = {2010},
	pages = {1662 - 1665},
	abstract = {Due to the limited amounts of on-chip memory, large volumes of data, and performance and power consumption overhead associated with interprocessor communication, efficient management of buffer memory is critical to multi-core image processing. To address this problem, this paper develops new modeling and analysis techniques based on dataflow representations, and demonstrates these techniques on a multi-core implementation case study involving multiple, concurrently-executing image processing applications. Our techniques are based on careful representation and exploitation of frame- or block-based operations, which involve repeated invocations of the same computations across regularly- arranged subsets of data. Using these new approaches to manage block-based image data, this paper demonstrates methods to analyze synchronization overhead and FIFO buffer sizes when mapping image processing applications onto heterogeneous, multi core architectures.},
	keywords = {block-based image data, buffer memory management, buffer storage, concurrently-executing image processing application, data flow computing, data flow representation, data subset, Dataflow, Digital signal processing, Energy consumption, Energy management, Engineering management, FIFO buffer sizes, Hardware, Image analysis, IMAGE PROCESSING, image processing application, image representation, interprocessor communication, memory architecture, Memory management, multiapplication image processing, multicore image processing, multiprocessing, on-chip memory, power consumption, power consumption overhead, Runtime, scheduling, set theory, shared memory, storage management chips, synchronization overhead},
	author = {Ko,Dong-Ik and Won, N. and Bhattacharyya, Shuvra S.}
}
@conference {19297,
	title = {FPGA-based design and implementation of the 3GPP-LTE physical layer using parameterized synchronous dataflow techniques},
	booktitle = {2010 IEEE International Conference on Acoustics Speech and Signal Processing (ICASSP)},
	year = {2010},
	month = {2010},
	pages = {1510 - 1513},
	abstract = {Synchronous dataflow (SDF) is an ubiquitous dataflow model of computation that has been studied extensively for efficient simulation and software synthesis of DSP applications. In recent years, parameterized SDF (PSDF) has evolved as a useful framework for modeling SDF graphs in which arbitrary parameters can be changed dynamically. However, the potential to enable efficient hardware synthesis has been treated relatively sparsely in the literature for SDF and even more so for the newer, more general PSDF model. This paper investigates efficient FPGA-based design and implementation of the physical layer for 3GPP-Long Term Evolution (LTE), a next generation cellular standard. To capture the SDF behavior of the functional core of LTE along with higher level dynamics in the standard, we use a novel PSDF-based FPGA architecture framework. We implement our PSDF-based, LTE design framework using National Instrument{\textquoteright}s LabVIEW FPGA, a recently-introduced commercial platform for reconfigurable hardware implementation. We show that our framework can effectively model the dynamics of the LTE protocol, while also providing a synthesis framework for efficient FPGA implementation.},
	keywords = {3G mobile communication, 3GPP-long term evolution, 3GPP-LTE physical layer, 4G communication systems, Computational modeling, data flow analysis, data flow graphs, Dataflow modeling, Digital signal processing, DSP applications, Field programmable gate arrays, FPGA architecture framework, FPGA implementation, FPGA-based design, Hardware, hardware synthesis, Instruments, LabVIEW FPGA, Logic Design, LTE, next generation cellular standard, parameterized synchronous data flow technique, Pervasive computing, Physical layer, Physics computing, Production, PSDF graph, reconfigurable hardware implementation, Runtime, software synthesis, Ubiquitous Computing, ubiquitous data flow model},
	author = {Kee, Hojin and Bhattacharyya, Shuvra S. and Wong, I. and Yong Rao}
}
@conference {16470,
	title = {ApproxRank: Estimating Rank for a Subgraph},
	booktitle = {IEEE 25th International Conference on Data Engineering, 2009. ICDE {\textquoteright}09},
	year = {2009},
	month = {2009/04/29/March},
	pages = {54 - 65},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {Customized semantic query answering, personalized search, focused crawlers and localized search engines frequently focus on ranking the pages contained within a subgraph of the global Web graph. The challenge for these applications is to compute PageRank-style scores efficiently on the subgraph, i.e., the ranking must reflect the global link structure of the Web graph but it must do so without paying the high overhead associated with a global computation. We propose a framework of an exact solution and an approximate solution for computing ranking on a subgraph. The IdealRank algorithm is an exact solution with the assumption that the scores of external pages are known. We prove that the IdealRank scores for pages in the subgraph converge. Since the PageRank-style scores of external pages may not typically be available, we propose the ApproxRank algorithm to estimate scores for the subgraph. Both IdealRank and ApproxRank represent the set of external pages with an external node L1 and extend the subgraph with links to L1. They also modify the PageRank-style transition matrix with respect to L1. We analyze the L1 distance between IdealRank scores and ApproxRank scores of the subgraph and show that it is within a constant factor of the L1 distance of the external pages (e.g., the true PageRank scores and uniform scores assumed by ApproxRank). We compare ApproxRank and a stochastic complementation approach (SC), a current best solution for this problem, on different types of subgraphs. ApproxRank has similar or superior performance to SC and typically improves on the runtime performance of SC by an order of magnitude or better. We demonstrate that ApproxRank provides a good approximation to PageRank for a variety of subgraphs.},
	keywords = {Application software, ApproxRank, Computer applications, Crawlers, customized semantic query answering, Data engineering, Educational institutions, Explosions, focused crawlers, global Web graph, graph theory, IdealRank algorithm, Internet, localized search engines, PageRank-style, personalized search, Query processing, Runtime, Search engines, Stochastic processes, Web pages},
	isbn = {978-1-4244-3422-0},
	doi = {10.1109/ICDE.2009.108},
	author = {Yao Wu and Raschid, Louiqa}
}
@conference {13367,
	title = {Exploiting Correlated Attributes in Acquisitional Query Processing},
	booktitle = {21st International Conference on Data Engineering, 2005. ICDE 2005. Proceedings},
	year = {2005},
	month = {2005/04/05/08},
	pages = {143 - 154},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {Sensor networks and other distributed information systems (such as the Web) must frequently access data that has a high per-attribute acquisition cost, in terms of energy, latency, or computational resources. When executing queries that contain several predicates over such expensive attributes, we observe that it can be beneficial to use correlations to automatically introduce low-cost attributes whose observation will allow the query processor to better estimate the selectivity of these expensive predicates. In particular, we show how to build conditional plans that branch into one or more sub-plans, each with a different ordering for the expensive query predicates, based on the runtime observation of low-cost attributes. We frame the problem of constructing the optimal conditional plan for a given user query and set of candidate low-cost attributes as an optimization problem. We describe an exponential time algorithm for finding such optimal plans, and describe a polynomial-time heuristic for identifying conditional plans that perform well in practice. We also show how to compactly model conditional probability distributions needed to identify correlations and build these plans. We evaluate our algorithms against several real-world sensor-network data sets, showing several-times performance increases for a variety of queries versus traditional optimization techniques.},
	keywords = {acquisitional query processing, Computer networks, Costs, data acquisition, Delay, Distributed computing, distributed information system, Distributed information systems, distributed processing, exponential time algorithm, optimization techniques, polynomial-time heuristic, Polynomials, probability, Query processing, real-time systems, real-world sensor-network, Runtime, Sensor phenomena and characterization, Sensor systems},
	isbn = {0-7695-2285-8},
	doi = {10.1109/ICDE.2005.63},
	author = {Deshpande, Amol and Guestrin,C. and Wei Hong and Madden,S.}
}
@conference {13343,
	title = {Using state modules for adaptive query processing},
	booktitle = {19th International Conference on Data Engineering, 2003. Proceedings},
	year = {2003},
	month = {2003/03/05/8},
	pages = {353 - 364},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {We present a query architecture in which join operators are decomposed into their constituent data structures (State Modules, or SteMs), and dataflow among these SteMs is managed adaptively by an eddy routing operator [R. Avnur et al., (2000)]. Breaking the encapsulation of joins serves two purposes. First, it allows the eddy to observe multiple physical operations embedded in a join algorithm, allowing for better calibration and control of these operations. Second, the SteM on a relation serves as a shared materialization point, enabling multiple competing access methods to share results, which can be leveraged by multiple competing join algorithms. Our architecture extends prior work significantly, allowing continuously adaptive decisions for most major aspects of traditional query optimization: choice of access methods and join algorithms, ordering of operators, and choice of a query spanning tree. SteMs introduce significant routing flexibility to the eddy, enabling more opportunities for adaptation, but also introducing the possibility of incorrect query results. We present constraints on eddy routing through SteMs that ensure correctness while preserving a great deal of flexibility. We also demonstrate the benefits of our architecture via experiments in the Telegraph dataflow system. We show that even a simple routing policy allows significant flexibility in adaptation, including novel effects like automatic "hybridization " of multiple algorithms for a single join.},
	keywords = {adaptive query processing, Bandwidth, Calibration, data encapsulation, data structure, Data structures, Databases, Dictionaries, eddy routing, eddy routing operator, Encapsulation, join operator, multiple algorithm automatic hybridization, multiple competing join algorithm, query architecture, Query processing, query spanning tree, Routing, routing policy, Runtime, shared materialization point, State Module, SteMs, Telegraph dataflow system, Telegraphy, Tree data structures},
	isbn = {0-7803-7665-X},
	doi = {10.1109/ICDE.2003.1260805},
	author = {Vijayshankar Raman and Deshpande, Amol and Hellerstein,J. M}
}
@article {17842,
	title = {Visualization of large data sets with the Active Data Repository},
	journal = {IEEE Computer Graphics and Applications},
	volume = {21},
	year = {2001},
	month = {2001/08//Jul},
	pages = {24 - 33},
	abstract = {We implement ray-casting-based volume rendering and isosurface rendering methods using the Active Data Repository (ADR) for visualizing out-of-core data sets. We have developed the ADR object-oriented framework to provide support for applications that employ range queries with user-defined mapping and aggregation operations on large-scale multidimensional data. ADR targets distributed-memory parallel machines with one or more disks attached to each node. It is designed as a set of modular services implemented in C++, which can be customized for application-specific processing. The ADR runtime system supports common operations such as memory management, data retrieval, and scheduling of processing across a parallel machine},
	keywords = {active data repository, ADR runtime system, Algorithm design and analysis, application-specific processing, C++, data mining, data retrieval, data visualisation, Data visualization, distributed-memory parallel machines, Indexing, Information retrieval, isosurface rendering, Isosurfaces, large data sets, large-scale multidimensional data, Memory management, modular services, out-of-core data sets, parallel machine, Parallel machines, Partitioning algorithms, ray-casting-based volume rendering, Rendering (computer graphics), Runtime, software libraries, storage management},
	isbn = {0272-1716},
	doi = {10.1109/38.933521},
	author = {Kurc, T. and Catalyurek,U. and Chang,Chialin and Sussman, Alan and Saltz, J.}
}
@conference {18689,
	title = {Proteus: a flexible infrastructure to implement adaptive fault tolerance in AQuA},
	year = {1999},
	month = {1999/11//},
	pages = {149 - 168},
	abstract = {Building dependable distributed systems from commercial off-the-shelf components is of growing practical importance. For both cost and production reasons, there is interest in approaches and architectures that facilitate building such systems. The AQuA architecture is one such approach; its goal is to provide adaptive fault tolerance to CORBA applications by replicating objects, providing a high-level method for applications to specify their desired dependability, and providing a dependability manager that attempts to reconfigure a system at runtime so that dependability requests are satisfied. This paper describes how dependability is provided in AQuA. In particular it describes Proteus, the part of AQuA that dynamically manages replicated distributed objects to make them dependable. Given a dependability request, Proteus chooses a fault tolerance approach and reconfigures the system to try to meet the request. The infrastructure of Proteus is described in this paper, along with its use in implementing active replication and a simple dependability policy},
	keywords = {adaptive fault tolerance, AQuA, commercial off-the-shelf components, CORBA applications, cost, dependable distributed systems, distributed object management, object replication, proteus, reconfigurable architectures, Runtime, Software architecture, software fault tolerance},
	doi = {10.1109/DCFTS.1999.814294},
	author = {Sabnis,C. and Michel Cukier and Ren,J. and Rubel,P. and Sanders,W. H. and Bakken,D. E. and Karr,D.}
}
@article {14770,
	title = {Critical path profiling of message passing and shared-memory programs},
	journal = {IEEE Transactions on Parallel and Distributed Systems},
	volume = {9},
	year = {1998},
	month = {1998/10//},
	pages = {1029 - 1040},
	abstract = {We introduce a runtime, nontrace-based algorithm to compute the critical path profile of the execution of message passing and shared-memory parallel programs. Our algorithm permits starting or stopping the critical path computation during program execution and reporting intermediate values. We also present an online algorithm to compute a variant of critical path, called critical path zeroing, that measures the reduction in application execution time that improving a selected procedure will have. Finally, we present a brief case study to quantify the runtime overhead of our algorithm and to show that online critical path profiling can be used to find program bottlenecks},
	keywords = {Computer Society, Concurrent computing, critical path computation, critical path profile, critical path zeroing, distributed processing, distributed shared memory systems, Instruments, Message passing, Monitoring, online algorithm, online critical path profiling, Parallel algorithms, program bottlenecks, Runtime, runtime nontrace-based algorithm, runtime overhead, shared-memory programs, system monitoring, Time measurement, Yarn},
	isbn = {1045-9219},
	doi = {10.1109/71.730530},
	author = {Hollingsworth, Jeffrey K}
}
@conference {14809,
	title = {Performance measurement using low perturbation and high precision hardware assists},
	booktitle = {, The 19th IEEE Real-Time Systems Symposium, 1998. Proceedings},
	year = {1998},
	month = {1998/12/02/4},
	pages = {379 - 388},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {We present the design and implementation of MultiKron PCI, a hardware performance monitor that can be plugged into any computer with a free PCI bus slot. The monitor provides a series of high-resolution timers, and the ability to monitor the utilization of the PCI bus. We also demonstrate how the monitor can be integrated with online performance monitoring tools such as the Paradyn parallel performance measurement tools to improve the overhead of key timer operations by a factor of 25. In addition, we present a series of case studies using the MultiKron hardware performance monitor to measure and tune high-performance parallel completing applications. By using the monitor, we were able to find and correct a performance bug in a popular implementation of the MPI message passing library that caused some communication primitives to run at one half their potential speed},
	keywords = {Clocks, Computerized monitoring, Counting circuits, Debugging, Hardware, hardware performance monitor, high precision hardware assists, low perturbation, measurement, MPI message passing library, MultiKron hardware performance monitor, MultiKron PCI, NIST, online performance monitoring tools, Paradyn parallel performance measurement tools, PCI bus slot, performance bug, performance evaluation, performance measurement, program debugging, program testing, real-time systems, Runtime, Timing},
	isbn = {0-8186-9212-X},
	doi = {10.1109/REAL.1998.739771},
	author = {Mink, A. and Salamon, W. and Hollingsworth, Jeffrey K and Arunachalam, R.}
}
@conference {14813,
	title = {MDL: a language and compiler for dynamic program instrumentation},
	booktitle = {, 1997 International Conference on Parallel Architectures and Compilation Techniques., 1997. Proceedings},
	year = {1997},
	month = {1997/11/10/14},
	pages = {201 - 212},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {We use a form of dynamic code generation, called dynamic instrumentation, to collect data about the execution of an application program. Dynamic instrumentation allows us to instrument running programs to collect performance and other types of information. The instrumentation code is generated incrementally and can be inserted and removed at any time. Our instrumentation currently runs on the SPARC, PA-RISC, Power 2, Alpha, and x86 architectures. Specification of what data to collect are written in a specialized language called the Metric Description Language, that is part of the Paradyn Parallel Performance Tools. This language allows platform independent descriptions of how to collect performance data. It also provides a concise way to specify, how to constrain performance data to particular resources such as modules, procedures, nodes, files, or message channels (or combinations of these resources). We also describe the details of how we weave instrumentation into a running program},
	keywords = {Alpha architecture, application program, application program interfaces, Application software, compiler generators, Computer science, dynamic code generation, Dynamic compiler, dynamic program instrumentation, Educational institutions, files, instrumentation code, Instruments, MDL, measurement, message channels, Message passing, Metric Description Language, modules, nodes, Operating systems, optimising compilers, PA-RISC, Paradyn Parallel Performance Tools, Parallel architectures, parallel programming, performance data, platform independent descriptions, Power 2 architecture, Power generation, procedures, program debugging, Program processors, running programs, Runtime, software metrics, SPARC, Specification languages, x86 architecture},
	isbn = {0-8186-8090-3},
	doi = {10.1109/PACT.1997.644016},
	author = {Hollingsworth, Jeffrey K and Niam, O. and Miller, B. P and Zhichen Xu and Goncalves,M. J.R and Ling Zheng}
}
@article {17104,
	title = {Dynamic queries for visual information seeking},
	journal = {IEEE Software},
	volume = {11},
	year = {1994},
	month = {1994/11//},
	pages = {70 - 77},
	abstract = {Considers how dynamic queries allow users to "fly through" databases by adjusting widgets and viewing the animated results. In studies, users reacted to this approach with an enthusiasm more commonly associated with video games. Adoption requires research into retrieval and display algorithms and user-interface design. The author discusses how experts may benefit from visual interfaces because they will be able to formulate more complex queries and interpret intricate results.<>},
	keywords = {Algorithm design and analysis, animated results, animation, Application software, Command languages, complex queries, database management systems, Databases, display algorithms, Displays, dynamic queries, Educational institutions, Games, Graphical user interfaces, human factors, Query processing, retrieval, Runtime, Technological innovation, user-interface design, visual databases, visual information seeking, visual interfaces, widgets},
	isbn = {0740-7459},
	doi = {10.1109/52.329404},
	author = {Shneiderman, Ben}
}
