@conference {12449,
	title = {P2C2: Programmable pixel compressive camera for high speed imaging},
	booktitle = {2011 IEEE Conference on Computer Vision and Pattern Recognition (CVPR)},
	year = {2011},
	month = {2011/06/20/25},
	pages = {329 - 336},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {We describe an imaging architecture for compressive video sensing termed programmable pixel compressive camera (P2C2). P2C2 allows us to capture fast phenomena at frame rates higher than the camera sensor. In P2C2, each pixel has an independent shutter that is modulated at a rate higher than the camera frame-rate. The observed intensity at a pixel is an integration of the incoming light modulated by its specific shutter. We propose a reconstruction algorithm that uses the data from P2C2 along with additional priors about videos to perform temporal super-resolution. We model the spatial redundancy of videos using sparse representations and the temporal redundancy using brightness constancy constraints inferred via optical flow. We show that by modeling such spatio-temporal redundancies in a video volume, one can faithfully recover the underlying high-speed video frames from the observed low speed coded video. The imaging architecture and the reconstruction algorithm allows us to achieve temporal super-resolution without loss in spatial resolution. We implement a prototype of P2C2 using an LCOS modulator and recover several videos at 200 fps using a 25 fps camera.},
	keywords = {Brightness, brightness constancy constraint, camera sensor, CAMERAS, compressive video sensing, high speed imaging, high-speed video frames, Image sequences, imaging, imaging architecture, independent shutter, Liquid crystal on silicon, low speed coded video, Modulation, optical flow, P2C2, programmable pixel compressive camera, reconstruction algorithm, sparse representation, Spatial resolution, spatio-temporal redundancies, temporal redundancy, temporal super-resolution, video coding},
	isbn = {978-1-4577-0394-2},
	doi = {10.1109/CVPR.2011.5995542},
	author = {Reddy, D. and Veeraraghavan,A. and Chellapa, Rama}
}
@conference {19284,
	title = {Automated generation of an efficient MPEG-4 Reconfigurable Video Coding decoder implementation},
	booktitle = {2010 Conference on Design and Architectures for Signal and Image Processing (DASIP)},
	year = {2010},
	month = {2010},
	pages = {265 - 272},
	abstract = {This paper proposes an automatic design flow from user-friendly design to efficient implementation of video processing systems. This design flow starts with the use of coarse-grain dataflow representations based on the CAL language, which is a complete language for dataflow programming of embedded systems. Our approach integrates previously developed techniques for detecting synchronous dataflow (SDF) regions within larger CAL networks, and exploiting the static structure of such regions using analysis tools in The Dataflow interchange format Package (TDP). Using a new XML format that we have developed to exchange dataflow information between different dataflow tools, we explore systematic implementation of signal processing systems using CAL, SDF-like region detection, TDP-based static scheduling, and CAL-to-C (CAL2C) translation. Our approach, which is a novel integration of three complementary dataflow tools - the CAL parser, TDP, and CAL2C - is demonstrated on an MPEG Reconfigurable Video Coding (RVC) decoder.},
	keywords = {automated generation, automatic design flow, CAL language, CAL networks, CAL-to-C translation, CAL2C translation, coarse-grain dataflow representations, Computational modeling, data flow computing, dataflow information, Dataflow programming, decoding, Digital signal processing, Libraries, MPEG-4 reconfigurable video coding decoder implementation, parallel languages, SDF detection, synchronous dataflow detection, TDP, TDP-based static scheduling, The Dataflow interchange format Package, Transform coding, user-friendly design, video coding, video processing systems, XML, XML format},
	author = {Gu, Ruirui and Piat, J. and Raulet, M. and Janneck, J.W. and Bhattacharyya, Shuvra S.}
}
@conference {19501,
	title = {On-chip stochastic communication [SoC applications]},
	booktitle = {Design, Automation and Test in Europe Conference and Exhibition, 2003},
	year = {2003},
	month = {2003///},
	pages = {790 - 795},
	abstract = {As CMOS technology scales down into the deep-submicron (DSM) domain, the costs of design and verification for systems-on-chip (SoCs) are rapidly increasing due to the inefficiency of traditional CAD tools. Relaxing the requirement of 100\% correctness for devices and interconnects drastically reduces the costs of design but, at the same time, requires that SoCs be designed with some system-level fault-tolerance. In this paper, we introduce a new communication paradigm for SoCs, namely stochastic communication. The newly proposed scheme not only separates communication from computation, but also provides the required built-in fault-tolerance to DSM failures, is scalable and cheap to implement. For a generic tile-based architecture, we show how a ubiquitous multimedia application (an MP3 encoder) can be implemented using stochastic communication in an efficient and robust manner. More precisely, up to 70\% data upsets, 80\% packet drops because of buffer overflow, and severe levels of synchronization failures can be tolerated while maintaining a low latency.},
	keywords = {buffer overflow, CMOS technology, CMOS technology scaling, Costs, data upsets, Design automation, Digital audio players, Fault tolerance, Fault tolerant systems, generic tile-based architecture, integrated circuit design, integrated circuit interconnections, interconnect correctness requirements, Logic Design, logic simulation, MP3 encoder, Multiprocessor interconnection networks, on-chip fault-tolerance, on-chip stochastic communication, packet drops, Pervasive computing, Robustness, SoC design, SoC verification, Stochastic processes, Synchronisation, synchronization failures, system latency, system-level fault-tolerance, system-on-chip, systems-on-chip, video coding},
	author = {Tudor Dumitras and Marculescu, R.}
}
@conference {18568,
	title = {Field-to-frame transcoding with spatial and temporal downsampling},
	booktitle = {Image Processing, 1999. ICIP 99. Proceedings. 1999 International Conference on},
	volume = {4},
	year = {1999},
	month = {1999///},
	pages = {271 -275 vol.4 - 271 -275 vol.4},
	abstract = {We present an algorithm for transcoding high-rate compressed bitstreams containing field-coded interlaced video to lower-rate compressed bitstreams containing frame-coded progressive video. We focus on MPEG-2 to H.263 transcoding, however these results can be extended to other lower-rate video compression standards including MPEG-4 simple profile and MPEG-1. A conventional approach to the transcoding problem involves decoding the input bitstream, spatially and temporally downsampling the decoded frames, and re-encoding the result. The proposed transcoder achieves improved performance by exploiting the details of the MPEG-2 and H.263 compression standards when performing interlaced to progressive (or field to frame) conversion with spatial downsampling and frame-rate reduction. The transcoder reduces the MPEG-2 decoding requirements by temporally downsampling the data at the bitstream level and reduces the H.263 encoding requirements by largely bypassing H.263 motion estimation by reusing the motion vectors and coding modes given in the input bitstream. In software implementations, the proposed approach achieved a 5 times; speedup over the conventional approach with only a 0.3 and 0.5 dB loss in PSNR for the Carousel and Bus sequences},
	keywords = {data compression, decoding, Encoding, field-coded interlaced video, field-to-frame transcoding, frame-coded progressive video, H.263 motion estimation, H.263 transcoding, high-rate compressed bitstreams, lower-rate compressed bitstreams, Motion estimation, MPEG-1, MPEG-2, MPEG-4, spatial downsampling, standards, temporal downsampling, transcoder, video coding, video compression standards},
	doi = {10.1109/ICIP.1999.819593},
	author = {Wee,S.J. and Apostolopoulos,J.G. and Feamster, Nick}
}
