@article {19253,
	title = {Design and Synthesis for Multimedia Systems Using the Targeted Dataflow Interchange Format},
	journal = {IEEE Transactions on Multimedia},
	volume = {14},
	year = {2012},
	month = {2012},
	pages = {630 - 640},
	abstract = {Development of multimedia systems that can be targeted to different platforms is challenging due to the need for rigorous integration between high-level abstract modeling, and low-level synthesis and optimization. In this paper, a new dataflow-based design tool called the targeted dataflow interchange format is introduced for retargetable design, analysis, and implementation of embedded software for multimedia systems. Our approach provides novel capabilities, based on principles of task-level dataflow analysis, for exploring and optimizing interactions across design components; object-oriented data structures for encapsulating contextual information for components; a novel model for representing parameterized schedules that are derived from repetitive graph structures; and automated code generation for programming interfaces and low-level customizations that are geared toward high-performance embedded-processing architectures. We demonstrate our design tool for cross-platform application design, parameterized schedule representation, and associated dataflow graph-code generation using a case study centered around an image registration application.},
	keywords = {associated dataflow graph-code generation, Computational modeling, contextual information encapsulation, cross-platform application design, data flow graphs, Data models, Data structures, Dataflow graphs, design components, design tools, Digital signal processing, electronic data interchange, embedded signal processing, Embedded software, high-level abstract modeling, high-performance embedded-processing architectures, Image coding, image registration application, image representation, low-level customizations, low-level optimization, low-level synthesis, Multimedia communication, multimedia systems, multimedia systems development, object-oriented data structures, object-oriented methods, parameterized schedule representation, programming interfaces, repetitive graph structures, retargetable design, Schedules, scheduling, software synthesis, Streaming media, targeted dataflow interchange format, task-level dataflow analysis},
	isbn = {1520-9210},
	author = {Chung-Ching Shen and Wu, Shenpei and Sane, N. and Wu, Hsiang-Huang and Plishker,W. and Bhattacharyya, Shuvra S.}
}
@conference {19291,
	title = {Rapid prototyping for digital signal processing systems using Parameterized Synchronous Dataflow graphs},
	booktitle = {2010 21st IEEE International Symposium on Rapid System Prototyping (RSP)},
	year = {2010},
	month = {2010},
	pages = {1 - 7},
	abstract = {Parameterized Synchronous Dataflow (PSDF) has been used previously for abstract scheduling and as a model for architecting embedded software and FPGA implementations. PSDF has been shown to be attractive for these purposes due to its support for flexible dynamic reconfiguration, and efficient quasi-static scheduling. To apply PSDF techniques more deeply into the design flow, support for comprehensive functional simulation and efficient hardware mapping is important. By building on the DIF (Dataflow Interchange Format), which is a design language and associated software package for developing and experimenting with dataflow-based design techniques for signal processing systems, we have developed a tool for functional simulation of PSDF specifications. This simulation tool allows designers to model applications in PSDF and simulate their functionality, including use of the dynamic parameter reconfiguration capabilities offered by PSDF. Based on this simulation tool, we also present a systematic design methodology for applying PSDF to the design and implementation of digital signal processing systems, with emphasis on FPGA-based systems for signal processing. We demonstrate capabilities for rapid and accurate prototyping offered by our proposed design methodology, along with its novel support for PSDF-based FPGA system implementation.},
	keywords = {abstract scheduling, Computational modeling, Computer architecture, data flow graphs, dataflow based design, dataflow interchange format, design flow, design language, Digital signal processing, digital signal processing systems, dynamic parameter reconfiguration, Dynamic scheduling, efficient hardware mapping, efficient quasistatic scheduling, Embedded software, embedded systems, Field programmable gate arrays, flexible dynamic reconfiguration, FPGA based systems, FPGA implementations, functional simulation, Hardware, parameterized synchronous dataflow graphs, rapid prototyping, Schedules, scheduling, semantics, simulation tool, software package, systematic design methodology},
	author = {Wu, Hsiang-Huang and Kee, Hojin and Sane, N. and Plishker,W. and Bhattacharyya, Shuvra S.}
}
@conference {12347,
	title = {A Communication Interface for Multiprocessor Signal Processing Systems},
	booktitle = {Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia},
	year = {2006},
	month = {2006/10//},
	pages = {127 - 132},
	publisher = {IEEE},
	organization = {IEEE},
	abstract = {Parallelization of embedded software is often desirable for power/performance-related considerations for computation-intensive applications that frequently occur in the signal-processing domain. Although hardware support for parallel computation is increasingly available in embedded processing platforms, there is a distinct lack of effective software support. One of the most widely known efforts in support of parallel software is the message passing interface (MPI). However, MPI suffers from several drawbacks with regards to customization to specialized parallel processing contexts, and performance degradation for communication-intensive applications. In this paper, we propose a new interface, the signal passing interface (SPI), that is targeted toward signal processing applications and addresses the limitations of MPI for this important domain of embedded software by integrating relevant properties of MPI and coarse-grain dataflow modeling. SPI is much easier and more intuitive to use, and due to its careful specialization, more performance-efficient for the targeted application domain. We present our preliminary version of SPI, along with experiments using SPI on a practical face detection system that demonstrate the capabilities of SPI},
	keywords = {application program interfaces, Application software, coarse-grain dataflow modeling, Computer applications, Concurrent computing, Context, data flow graphs, Embedded computing, Embedded software, face detection system, Hardware, Message passing, message passing interface, MPI, Multiprocessing systems, multiprocessor signal processing system, PARALLEL PROCESSING, signal passing interface, Signal processing, SPI},
	isbn = {0-7803-9783-5},
	doi = {10.1109/ESTMED.2006.321285},
	author = {Sankalita Saha and Bhattacharyya, Shuvra S. and Wayne Wolf}
}
